Retire obsolete tools and publish the public RTL contribution roadmap

[hkimw]

The public docs still directed contributors to discontinued PCCX Lab, SystemVerilog IDE and Launcher workflows. Update the English and Korean homepages, roadmap, quickstart, onboarding and verification guidance around public SystemVerilog RTL contributions, and clearly separate historical records from current evidence.

Remove retired-product links and the optional Lab checkout/build from the deployment workflow. Align the README and llms.txt with the same scope, and fix GitHub source/edit links and the reusable RTL destination.

The current RTL runner still depends on the retired Lab converter. This release documents that open prerequisite and points to KV260 #152; it does not claim the runner was migrated or a new RTL simulation passed. New milestone dates remain unassigned.

Validation:

• EN and KO: make strict with -W --keep-going -n, using the public v002 source checkout.
• 20 generated pages: 2,310 links checked for retired-product destinations, internal files/anchors and malformed GitHub source paths; no errors.
• All five workflow YAML files parse; git diff --check passes.
• Documented repository-boundary check and testbench listing succeed on v002 54694e9; the listing contains 14 testbenches and is not a simulation run.
• Local browser review of both roadmap languages; production verification follows the Cloudflare deployment.